CIOL

Synopsys DFT MAX mainstream use at 90nm and below

MOUNTAIN VIEW, USA: Synopsys Inc. announced that Synopsys' DFT MAX compression product has been successfully deployed at more than one hundred semiconductors companies from all industry segments to ...
EDN

ITC 2008: Synopsys touts DFT MAX compression adoption at 90 nm

Synopsys announced at the International Test Conference that its DFT MAX compression product has been successfully deployed at more than one hundred semiconductors companies from all industry segments ...
EDN

Open-Silicon adopts Synopsys DFT MAX for ASICs

Synopsys has announced that Open-Silicon has adopted Synopsys' DFT MAX scan-compression technology to reduce the cost of testing its 130-, 90- and 65-nm ASIC designs while having minimal impact on ...
CIOL

Open-Silicon adopts Synopsys' DFT MAX to lower ASIC costs

BANGALORE & CALIFORNIA, US: Synopsys, Inc., a leader in semiconductor design software, recently announced that Open-Silicon, a leading supplier of predictable, reliable and cost-effective ASIC ...
Finanznachrichten

Oki Adopts DFT MAX to Improve Test Quality

DFT MAX implements compression on-chip that results in significantly less data required for each test pattern. Using DFT MAX, Oki was able to apply comprehensive at-speed testing in addition to its ...
Design-Reuse

Complex SoC Testing with a Core-Based DFT Strategy

With scaling technology and increasing design sizes, power consumption during test and test data volume have grown dramatically - making it almost impossible to test an entire design once it reaches ...